Sensing schemes are used for volatile and non-volatile memories implementing multi-level storage within one memory cell. Such a multi-level storage may have more than two states, i.e., more than two information values may be stored within the cell. Therefore, multi-level storage is a promising option to reduce the effective (semiconductor) area per bit. The principle is, for example, applicable to floating-gate memory cells or for other non-volatile memory cells like phase-change memories (PCRAM), conducting-bridge memory (CBRAM), threshold switching memories, metal-oxide based memories or NROM memories. As the different storage techniques make use of different physical effects to store information, the general term “state” shall in the following describe the different possible physical properties of materials to store information. Therefore, the term “state” may describe different orientations of magnetic domains or different magnetic moments as well as different crystalline structures (amorphous, mono-crystalline or mixtures of both), different refraction indices of materials, different resistances of a material or the like. A state may also be one of different charges stored on a capacitor. It is going without saying that the above list is not final. Embodiments of the present invention may therefore also be applied to any forthcoming technique allowing to store/preserve more than two states, exploiting a physical property of a material or circuit technique.
Generally, when sensing stored information, reliability and energy consumption is an issue. Sensing multiple possible stored states (information values) in parallel requires a lot of silicon real estate and power, since a detection circuit must be present for each possible state. Especially with memory arrays having large word-sizes (bit-lines to be readout in parallel), a standard architecture using n−1 sense amplifiers to sense n possible stored levels or states, is no longer feasible. Each individual sense amplifier would have to be accurately adjusted to distinguish between different levels and to apply precisely the same thresholds than the corresponding sense amplifiers of the other bit-lines. This would furthermore result in sensing circuits which waste large areas of silicon on an integrated device.